From af7382deed328010a7dfd5ddc03026b27d154162 Mon Sep 17 00:00:00 2001 From: kunxian xia Date: Thu, 18 Dec 2025 14:49:37 +0800 Subject: [PATCH] record instret during prelight execution --- crates/circuits/mod-builder/src/core_chip.rs | 1 + crates/vm/src/arch/execution.rs | 1 + crates/vm/src/arch/state.rs | 1 + crates/vm/src/arch/testing/cpu.rs | 2 ++ crates/vm/src/arch/testing/cuda.rs | 2 ++ crates/vm/src/system/phantom/mod.rs | 9 +++++++-- crates/vm/src/system/public_values/core.rs | 1 + extensions/keccak256/circuit/src/trace.rs | 1 + extensions/native/circuit/src/branch_eq/core.rs | 2 ++ extensions/native/circuit/src/castf/core.rs | 1 + extensions/native/circuit/src/field_arithmetic/core.rs | 1 + extensions/native/circuit/src/field_extension/core.rs | 1 + extensions/native/circuit/src/fri/mod.rs | 1 + extensions/native/circuit/src/jal_rangecheck/mod.rs | 2 ++ extensions/native/circuit/src/loadstore/core.rs | 1 + extensions/native/circuit/src/poseidon2/chip.rs | 1 + extensions/native/circuit/src/sumcheck/chip.rs | 1 + extensions/rv32im/circuit/src/auipc/core.rs | 1 + extensions/rv32im/circuit/src/base_alu/core.rs | 1 + extensions/rv32im/circuit/src/branch_eq/core.rs | 2 ++ extensions/rv32im/circuit/src/branch_lt/core.rs | 2 ++ extensions/rv32im/circuit/src/divrem/core.rs | 1 + extensions/rv32im/circuit/src/hintstore/mod.rs | 1 + extensions/rv32im/circuit/src/jal_lui/core.rs | 1 + extensions/rv32im/circuit/src/jalr/core.rs | 2 ++ extensions/rv32im/circuit/src/less_than/core.rs | 1 + extensions/rv32im/circuit/src/load_sign_extend/core.rs | 1 + extensions/rv32im/circuit/src/loadstore/core.rs | 1 + extensions/rv32im/circuit/src/mul/core.rs | 1 + extensions/rv32im/circuit/src/mulh/core.rs | 1 + extensions/rv32im/circuit/src/shift/core.rs | 1 + extensions/sha256/circuit/src/sha256_chip/trace.rs | 1 + 32 files changed, 45 insertions(+), 2 deletions(-) diff --git a/crates/circuits/mod-builder/src/core_chip.rs b/crates/circuits/mod-builder/src/core_chip.rs index f9f2c5994b..4342a2d673 100644 --- a/crates/circuits/mod-builder/src/core_chip.rs +++ b/crates/circuits/mod-builder/src/core_chip.rs @@ -425,6 +425,7 @@ where &mut adapter_record, ); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) } diff --git a/crates/vm/src/arch/execution.rs b/crates/vm/src/arch/execution.rs index b6c8270585..27df935c7c 100644 --- a/crates/vm/src/arch/execution.rs +++ b/crates/vm/src/arch/execution.rs @@ -216,6 +216,7 @@ pub trait PreflightExecutor> { #[derive(derive_new::new)] pub struct VmStateMut<'a, F, MEM, RA> { pub pc: &'a mut u32, + pub instret: &'a mut u64, pub memory: &'a mut MEM, pub streams: &'a mut Streams, pub rng: &'a mut StdRng, diff --git a/crates/vm/src/arch/state.rs b/crates/vm/src/arch/state.rs index 883b56c494..b0403036c2 100644 --- a/crates/vm/src/arch/state.rs +++ b/crates/vm/src/arch/state.rs @@ -67,6 +67,7 @@ impl VmState { pub fn into_mut<'a, RA>(&'a mut self, ctx: &'a mut RA) -> VmStateMut<'a, F, MEM, RA> { VmStateMut { pc: &mut self.pc, + instret: &mut self.instret, memory: &mut self.memory, streams: &mut self.streams, rng: &mut self.rng, diff --git a/crates/vm/src/arch/testing/cpu.rs b/crates/vm/src/arch/testing/cpu.rs index 70c374968c..1868bbf744 100644 --- a/crates/vm/src/arch/testing/cpu.rs +++ b/crates/vm/src/arch/testing/cpu.rs @@ -98,8 +98,10 @@ where tracing::debug!("initial_timestamp={}", self.memory.memory.timestamp()); let mut pc = initial_pc; + let mut instret = 0; let state_mut = VmStateMut { pc: &mut pc, + instret: &mut instret, memory: &mut self.memory.memory, streams: &mut self.streams, rng: &mut self.rng, diff --git a/crates/vm/src/arch/testing/cuda.rs b/crates/vm/src/arch/testing/cuda.rs index 0427f50671..a5abb907b7 100644 --- a/crates/vm/src/arch/testing/cuda.rs +++ b/crates/vm/src/arch/testing/cuda.rs @@ -132,8 +132,10 @@ impl TestBuilder for GpuChipTestBuilder { tracing::debug!("initial_timestamp={}", initial_state.timestamp); let mut pc = initial_pc; + let mut instret = 0; let state_mut = VmStateMut::new( &mut pc, + &mut instret, &mut self.memory.memory, &mut self.streams, &mut self.rng, diff --git a/crates/vm/src/system/phantom/mod.rs b/crates/vm/src/system/phantom/mod.rs index 19df72812b..5d3446867a 100644 --- a/crates/vm/src/system/phantom/mod.rs +++ b/crates/vm/src/system/phantom/mod.rs @@ -157,14 +157,18 @@ where SysPhantom::CtStart => { let metrics = state.metrics; if let Some(info) = metrics.debug_infos.get(pc) { - metrics.cycle_tracker.start(info.dsl_instruction.clone()); + metrics + .cycle_tracker + .start(info.dsl_instruction.clone(), *state.instret as usize); } } #[cfg(feature = "perf-metrics")] SysPhantom::CtEnd => { let metrics = state.metrics; if let Some(info) = metrics.debug_infos.get(pc) { - metrics.cycle_tracker.end(info.dsl_instruction.clone()); + metrics + .cycle_tracker + .end(info.dsl_instruction.clone(), *state.instret as usize); } } _ => {} @@ -187,6 +191,7 @@ where inner: err, })?; } + *state.instret += 1; *state.pc += DEFAULT_PC_STEP; state.memory.increment_timestamp(); diff --git a/crates/vm/src/system/public_values/core.rs b/crates/vm/src/system/public_values/core.rs index 9d2b861536..57c77b671a 100644 --- a/crates/vm/src/system/public_values/core.rs +++ b/crates/vm/src/system/public_values/core.rs @@ -202,6 +202,7 @@ where } } + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/keccak256/circuit/src/trace.rs b/extensions/keccak256/circuit/src/trace.rs index 489b72751e..59d9376ee7 100644 --- a/extensions/keccak256/circuit/src/trace.rs +++ b/extensions/keccak256/circuit/src/trace.rs @@ -235,6 +235,7 @@ where } // Due to the AIR constraints, the final memory timestamp should be the following: + *state.instret += 1; state.memory.timestamp = record.inner.timestamp + (len + KECCAK_REGISTER_READS + KECCAK_ABSORB_READS + KECCAK_DIGEST_WRITES) as u32; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); diff --git a/extensions/native/circuit/src/branch_eq/core.rs b/extensions/native/circuit/src/branch_eq/core.rs index e0669d0133..6e12671416 100644 --- a/extensions/native/circuit/src/branch_eq/core.rs +++ b/extensions/native/circuit/src/branch_eq/core.rs @@ -76,6 +76,8 @@ where *state.pc = state.pc.wrapping_add(self.pc_step); } + *state.instret += 1; + Ok(()) } } diff --git a/extensions/native/circuit/src/castf/core.rs b/extensions/native/circuit/src/castf/core.rs index 776e3086b5..633b568b5f 100644 --- a/extensions/native/circuit/src/castf/core.rs +++ b/extensions/native/circuit/src/castf/core.rs @@ -157,6 +157,7 @@ where self.adapter .write(state.memory, instruction, x, &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/native/circuit/src/field_arithmetic/core.rs b/extensions/native/circuit/src/field_arithmetic/core.rs index 112797701d..19822c5fcf 100644 --- a/extensions/native/circuit/src/field_arithmetic/core.rs +++ b/extensions/native/circuit/src/field_arithmetic/core.rs @@ -163,6 +163,7 @@ where self.adapter .write(state.memory, instruction, [a_val], &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/native/circuit/src/field_extension/core.rs b/extensions/native/circuit/src/field_extension/core.rs index a7d535a14b..37e8767cd7 100644 --- a/extensions/native/circuit/src/field_extension/core.rs +++ b/extensions/native/circuit/src/field_extension/core.rs @@ -194,6 +194,7 @@ where self.adapter .write(state.memory, instruction, x, &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/native/circuit/src/fri/mod.rs b/extensions/native/circuit/src/fri/mod.rs index 4a0d3847d5..66cd1e0f83 100644 --- a/extensions/native/circuit/src/fri/mod.rs +++ b/extensions/native/circuit/src/fri/mod.rs @@ -887,6 +887,7 @@ where ); record.common.result_ptr = e; + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/native/circuit/src/jal_rangecheck/mod.rs b/extensions/native/circuit/src/jal_rangecheck/mod.rs index ad8b27489e..efa5c88df6 100644 --- a/extensions/native/circuit/src/jal_rangecheck/mod.rs +++ b/extensions/native/circuit/src/jal_rangecheck/mod.rs @@ -233,6 +233,8 @@ where *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); } + *state.instret += 1; + Ok(()) } } diff --git a/extensions/native/circuit/src/loadstore/core.rs b/extensions/native/circuit/src/loadstore/core.rs index 2b8c35a067..57276863a4 100644 --- a/extensions/native/circuit/src/loadstore/core.rs +++ b/extensions/native/circuit/src/loadstore/core.rs @@ -175,6 +175,7 @@ where core_record.pointer_read = pointer_read; core_record.data = data; + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/native/circuit/src/poseidon2/chip.rs b/extensions/native/circuit/src/poseidon2/chip.rs index 770efc7307..ed85b28808 100644 --- a/extensions/native/circuit/src/poseidon2/chip.rs +++ b/extensions/native/circuit/src/poseidon2/chip.rs @@ -827,6 +827,7 @@ where unreachable!() } + *state.instret += 1; *state.pc += DEFAULT_PC_STEP; Ok(()) } diff --git a/extensions/native/circuit/src/sumcheck/chip.rs b/extensions/native/circuit/src/sumcheck/chip.rs index d5e6f49a62..6a1b907ed9 100644 --- a/extensions/native/circuit/src/sumcheck/chip.rs +++ b/extensions/native/circuit/src/sumcheck/chip.rs @@ -481,6 +481,7 @@ where } assert_eq!(eval_acc, elem_to_ext(F::from_canonical_u32(0)),); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) } diff --git a/extensions/rv32im/circuit/src/auipc/core.rs b/extensions/rv32im/circuit/src/auipc/core.rs index 73d9345a8f..22a77c4f6f 100644 --- a/extensions/rv32im/circuit/src/auipc/core.rs +++ b/extensions/rv32im/circuit/src/auipc/core.rs @@ -238,6 +238,7 @@ where self.adapter .write(state.memory, instruction, rd, &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/base_alu/core.rs b/extensions/rv32im/circuit/src/base_alu/core.rs index 1e57b4485c..4e235d2d35 100644 --- a/extensions/rv32im/circuit/src/base_alu/core.rs +++ b/extensions/rv32im/circuit/src/base_alu/core.rs @@ -231,6 +231,7 @@ where self.adapter .write(state.memory, instruction, [rd].into(), &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/branch_eq/core.rs b/extensions/rv32im/circuit/src/branch_eq/core.rs index 6b08062f47..836d90302e 100644 --- a/extensions/rv32im/circuit/src/branch_eq/core.rs +++ b/extensions/rv32im/circuit/src/branch_eq/core.rs @@ -199,6 +199,8 @@ where *state.pc = state.pc.wrapping_add(self.pc_step); } + *state.instret += 1; + Ok(()) } } diff --git a/extensions/rv32im/circuit/src/branch_lt/core.rs b/extensions/rv32im/circuit/src/branch_lt/core.rs index 7d52dacc18..150bdd6474 100644 --- a/extensions/rv32im/circuit/src/branch_lt/core.rs +++ b/extensions/rv32im/circuit/src/branch_lt/core.rs @@ -253,6 +253,8 @@ where *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); } + *state.instret += 1; + Ok(()) } } diff --git a/extensions/rv32im/circuit/src/divrem/core.rs b/extensions/rv32im/circuit/src/divrem/core.rs index a7f18c1821..e2682371f7 100644 --- a/extensions/rv32im/circuit/src/divrem/core.rs +++ b/extensions/rv32im/circuit/src/divrem/core.rs @@ -456,6 +456,7 @@ where self.adapter .write(state.memory, instruction, [rd].into(), &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/hintstore/mod.rs b/extensions/rv32im/circuit/src/hintstore/mod.rs index 4f1beb6781..679edd3c09 100644 --- a/extensions/rv32im/circuit/src/hintstore/mod.rs +++ b/extensions/rv32im/circuit/src/hintstore/mod.rs @@ -468,6 +468,7 @@ where &mut record.var[idx].data_write_aux.prev_data, ); } + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/jal_lui/core.rs b/extensions/rv32im/circuit/src/jal_lui/core.rs index 1662d6400c..88ca59b3cb 100644 --- a/extensions/rv32im/circuit/src/jal_lui/core.rs +++ b/extensions/rv32im/circuit/src/jal_lui/core.rs @@ -203,6 +203,7 @@ where .write(state.memory, instruction, rd_data, &mut adapter_record); *state.pc = to_pc; + *state.instret += 1; Ok(()) } diff --git a/extensions/rv32im/circuit/src/jalr/core.rs b/extensions/rv32im/circuit/src/jalr/core.rs index d912d0148e..ab61b68a87 100644 --- a/extensions/rv32im/circuit/src/jalr/core.rs +++ b/extensions/rv32im/circuit/src/jalr/core.rs @@ -267,6 +267,8 @@ where // RISC-V spec explicitly sets the least significant bit of `to_pc` to 0 *state.pc = to_pc & !1; + *state.instret += 1; + Ok(()) } } diff --git a/extensions/rv32im/circuit/src/less_than/core.rs b/extensions/rv32im/circuit/src/less_than/core.rs index 2dfcece2ce..81d495ebd6 100644 --- a/extensions/rv32im/circuit/src/less_than/core.rs +++ b/extensions/rv32im/circuit/src/less_than/core.rs @@ -242,6 +242,7 @@ where &mut adapter_record, ); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/load_sign_extend/core.rs b/extensions/rv32im/circuit/src/load_sign_extend/core.rs index 6c4193a81a..184985283a 100644 --- a/extensions/rv32im/circuit/src/load_sign_extend/core.rs +++ b/extensions/rv32im/circuit/src/load_sign_extend/core.rs @@ -257,6 +257,7 @@ where &mut adapter_record, ); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/loadstore/core.rs b/extensions/rv32im/circuit/src/loadstore/core.rs index daf7738ff5..a02d179a3f 100644 --- a/extensions/rv32im/circuit/src/loadstore/core.rs +++ b/extensions/rv32im/circuit/src/loadstore/core.rs @@ -314,6 +314,7 @@ where self.adapter .write(state.memory, instruction, write_data, &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/mul/core.rs b/extensions/rv32im/circuit/src/mul/core.rs index e4d5e536b2..96513a1b44 100644 --- a/extensions/rv32im/circuit/src/mul/core.rs +++ b/extensions/rv32im/circuit/src/mul/core.rs @@ -211,6 +211,7 @@ where self.adapter .write(state.memory, instruction, [a].into(), &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) } diff --git a/extensions/rv32im/circuit/src/mulh/core.rs b/extensions/rv32im/circuit/src/mulh/core.rs index 9d522eafb1..fda739327e 100644 --- a/extensions/rv32im/circuit/src/mulh/core.rs +++ b/extensions/rv32im/circuit/src/mulh/core.rs @@ -286,6 +286,7 @@ where self.adapter .write(state.memory, instruction, [a].into(), &mut adapter_record); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/rv32im/circuit/src/shift/core.rs b/extensions/rv32im/circuit/src/shift/core.rs index 4e8efe6dbd..a9b6bb5380 100644 --- a/extensions/rv32im/circuit/src/shift/core.rs +++ b/extensions/rv32im/circuit/src/shift/core.rs @@ -338,6 +338,7 @@ where [output].into(), &mut adapter_record, ); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(()) diff --git a/extensions/sha256/circuit/src/sha256_chip/trace.rs b/extensions/sha256/circuit/src/sha256_chip/trace.rs index 7fc5c7062c..655e9c929e 100644 --- a/extensions/sha256/circuit/src/sha256_chip/trace.rs +++ b/extensions/sha256/circuit/src/sha256_chip/trace.rs @@ -239,6 +239,7 @@ where &mut record.inner.write_aux.prev_data, ); + *state.instret += 1; *state.pc = state.pc.wrapping_add(DEFAULT_PC_STEP); Ok(())